CST334 Week 4

    This week was all about diving deeper into how operating systems manage memory via paging, swapping, and caching.
    Paging is a method the OS uses to divide memory into evenly size blocks. I learned how the system uses a Virtual Page Number (VPN) to keep track of which pages are being used, and how the offset helps determine the exact location within that page. One of the key points was how the virtual address gets translated into a physical address using a Page Table Entry (PTE), which acts like a map for locating memory.
    I learned how Translation Lookaside Buffers (TLBs) are used to improve performance during frequent memory lookups. These are special caches that store recently used memory translations, making memory access much faster when there's a 'hit'. I also learned how to calculate average memory access time by using the hit and miss rates of a TLB and factoring in the number of cycles each operation takes.
    From there I learned about multilevel paging, which helps reduce the size of page tables by breaking them down hierarchically. We also covered how CPUs like the Pentium handle memory caching and address translation.
    Another big topic was swapping, where slower storage like a hard drive is temporarily used as memory. The OS swaps in memory pages that are needed and swaps out less active ones, allowing for more flexible memory use at a performance cost.
    Finally, we discussed caching algorithms, how memory hit and miss patterns are managed, and how to draw out their logic to calculate their hit/miss rates. This was a great opportunity to see exactly how different algorithms affect performance, and how clever memory management plays a huge role in system speed.
    This week gave me a much stronger grasp of memory virtualization and the performance tradeoffs that come with each approach. I feel like I'm getting a clearer picture of how all these components work together to make modern operating systems function efficiently.